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CDCDLP223PWR

  • 描述:电源电压: 3V~3.6V 输入比率 / 输出比率: 1:3 最大频率: 400MHz 供应商设备包装: 20-TSSOP 工作温度: -40摄氏度~85摄氏度 安装类别: 表面安装
  • 品牌: 德州仪器 (Texas)
  • 交期:5-7 工作日
渠道:
  • 自营
  • 得捷
  • 贸泽

起订量: 104

  • 库存: 48000
  • 单价: ¥20.93198
  • 数量:
    - +
  • 总计: ¥2,176.93
在线询价

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规格参数

  • 锁相回路 Yes with Bypass
  • 电线数量 one
  • 分频器或倍频器 否/否
  • 电源电压 3V~3.6V
  • 安装类别 表面安装
  • 工作温度 -40摄氏度~85摄氏度
  • 输入比率 / 输出比率 1:3
  • 输入差分 / 输出差分 否/是
  • 部件状态 过时的
  • 输入值 晶体
  • 制造厂商 德州仪器 (Texas)
  • 输出 LVTTL
  • 最大频率 400MHz
  • 包装/外壳 20-TSSOP(0.173“,4.40毫米宽)
  • 供应商设备包装 20-TSSOP
  • 种类 扩频时钟驱动器

CDCDLP223PWR 产品详情

The CDCDLP223PWR is a PLL-based high performance clock synthesizer that is optimized for use in DLP systems. It uses a 20 MHz crystal to generate the fundamental frequency and derives the frequencies for the 100 MHz HCLK and the 300 MHz HCLK output. Further, the CDCDLP223PWR generates a buffered copy of the 20 MHz Crystal Oscillator Frequency at the 20 MHz output terminal.

The 100 MHz HCLK output provides the reference clock for the XDR Clock Generator (CDCD5704). Spread-spectrum clocking with 0.5% down spread, which reduces Electro Magnetic Interference (EMI), isapplied in the default configuration. The spread-spectrum clocking (SSC) is turned on and off via the serial control interface.

The 300 MHz HCLK output provides a 200-400MHz clock signal for the DMD Control Logic of the DLP Control ASIC. Frequency selection in 20 MHz steps is possible via the serial control interface. Spread-spectrum clocking with ±1.0% or ±1.5% center spread is applied, which can be disabled via the serial control interface

The CDCDLP223PWR features a fail safe start-up circuit, which enables the PLLs only if a sufficient supply voltage is applied and a stable oscillation is delivered from the crystal oscillator. After the crystal start-up time and the PLL stabilization time, all outputs are ready for use.

The CDCDLP223PWR works from a single 3.3-V supply andis characterized for operation from -40°C to 85°C.

Feature

  • High-Performance Clock Synthesizer
  • Uses a 20 MHz Crystal Input to Generate Multiple Output Frequencies
  • Integrated Load Capacitance for 20 MHz Oscillator Reducing System Cost
  • All PLL Loop Filter Components are Integrated
  • Generates the Following Clocks:
    • REF CLK 20 MHz (Buffered)
    • XCG CLK 100 MHz With SSC
    • DMD CLK 200-400 MHz With Selectable SSC
  • Very Low Period Jitter Characteristic:
    • ±100 ps at 20 MHz Output
    • ±75 ps at 100 MHz and 200-400 MHz Outputs
  • Includes Spread-Spectrum Clocking (SSC), With Down Spread for 100 MHz and Center Spread for 200-400 MHz
  • HCLK Differential Outputs forthe 100 MHz and the 200-400 MHz Clock
  • Operates From Single 3.3-V Supply
  • Packaged in TSSOP20
  • Characterized for the Industrial Temperature Range -40°C to 85°C
  • ESD Protection Exceeds JESD22
  • 2000-V Human-Body Model (A114-C) - MIL-STD-883, Method 3015
  • TYPICAL APPLICATIONS
    • Central Clock Generator for DLP Systems
CDCDLP223PWR所属分类:时钟发生器/锁相环/频率合成芯片,CDCDLP223PWR 由 德州仪器 (Texas) 设计生产,可通过久芯网进行购买。CDCDLP223PWR价格参考¥20.931981,你可以下载 CDCDLP223PWR中文资料、PDF数据手册、Datasheet数据手册功能说明书,可查询CDCDLP223PWR规格参数、现货库存、封装信息等信息!

德州仪器 (Texas)

德州仪器 (Texas)

德州仪器公司(TI)是一家开发模拟IC和嵌入式处理器的全球半导体设计和制造公司。通过雇用世界上最聪明的人,TI创造了塑造技术未来的创新。如今,TI正在帮助超过10万名客户改变未来。

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