The references for the eight DACs are derived from two reference pins (one per DAC quad). These reference inputs can be configured as buffered, unbuffered, or VDD inputs. The parts incorporate a power-on reset circuit, which ensures that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. The outputs of all DACs may be updated simultaneously using the asynchronous LDAC input. The parts contain a power-down feature that reduces the current consumption of the devices to 400 nA at 5 V (120 nA at 3 V). The eight channels of the DAC may be powered down individually.
All three parts are offered in the same pinout, which allows users to select the resolution appropriate for their application without redesigning their circuit board.
Feature
- AD5308: 8 buffered 8-bit DACs in 16-lead TSSOP A version: ±1 LSB INL, B version: ±0.75 LSB INL
- AD5318: 8 buffered 10-bit DACs in 16-lead TSSOP A version: ±4 LSB INL, B version: ±3 LSB INL
- AD5328: 8 buffered 12-bit DACs in 16-lead TSSOP A version: ±16 LSB INL, B version: ±12 LSB INL
- Low power operation: 0.7 mA @ 3 V
- Power-down to 120 nA @ 3 V, 400 nA @ 5 V
- Double-buffered input logic
- Guaranteed monotonic by design over all codes
- Buffered/unbuffered/VDD reference input options
- Output range: 0 V to VREF or 0 V to 2 VREF
- Power-on reset to 0 V
- ProgrammabilityIndividual channel power-down Simultaneous update of outputs (LDAC)
- Low power, SPI-®, QSPI-™, MICROWIRE-™, and DSP-compatible 3-wire serial interface
Applications
- Portable battery-powered instruments
- Digital gain and offset adjustment
- Programmable voltage and current sources
- Optical networking
- Automatic test equipment
- Mobile communications
- Programmable attenuators
- Industrial process control
(Picture: Pinout)
