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LCMXO2-2000ZE-3TG100I

  • 描述:电源电压: 1.14伏~1.26伏 供应商设备包装: 100-TQFP(14x14) 工作温度: -40摄氏度~100摄氏度(TJ) 安装类别: 表面安装
  • 品牌: 莱迪思 (Lattice)
  • 交期:5-7 工作日
渠道:
  • 自营
  • 得捷
  • 贸泽

起订量: 90

  • 库存: 0
  • 单价: ¥120.59429
  • 数量:
    - +
  • 总计: ¥10,853.49
在线询价

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规格参数

  • 制造厂商 莱迪思 (Lattice)
  • 部件状态 可供货
  • 闸门数量 -
  • 安装类别 表面安装
  • 工作温度 -40摄氏度~100摄氏度(TJ)
  • 电源电压 1.14伏~1.26伏
  • 逻辑阵列块/可配置逻辑块数量 264
  • 逻辑元件/单元的数量 2112
  • RAM 总位数 75776
  • 输入/输出数量 79
  • 包装/外壳 100-LQFP
  • 供应商设备包装 100-TQFP(14x14)

LCMXO2-2000ZE-3TG100I 产品详情

The MachXO2 family of ultra-low power, instant-on, non-volatile PLDs has six devices with densities ranging from 256 to 6864 Look-Up Tables (LUTs). In addition to LUT-based, low-cost programmable logic these devices feature Embedded Block RAM (EBR), Distributed RAM, User Flash Memory (UFM), Phase Locked Loops (PLLs), preengineered source synchronous I/O support, advanced configuration support including dual-boot capability and hardened versions of commonly used functions such as SPI controller, I2C controller and timer/counter. These features allow these devices to be used in low cost, high volume consumer and system applications.

Feature

 Flexible Logic Architecture 

• Six devices with 256 to 6864 LUT4s and 19 to 335 I/Os 

 Ultra Low Power Devices 

• Advanced 65 nm low power process 

• As low as 19 µW standby power 

• Programmable low swing differential I/Os 

• Stand-by mode and other power saving options 

 Embedded and Distributed Memory 

• Up to 240 Kbits sysMEM™ Embedded Block RAM 

• Up to 54 Kbits Distributed RAM 

• Dedicated FIFO control logic 

 On-Chip User Flash Memory 

• Up to 256 Kbits of User Flash Memory 

• 100,000 write cycles 

• Accessible through WISHBONE, SPI, I2 C and JTAG interfaces 

• Can be used as soft processor PROM or as Flash memory 

 Pre-Engineered Source Synchronous I/O 

• DDR registers in I/O cells 

• Dedicated gearing logic 

• 7:1 Gearing for Display I/Os 

• Generic DDR, DDRX2, DDRX4 

• Dedicated DDR/DDR2/LPDDR memory with DQS support

 High Performance, Flexible I/O Buffer 

• Programmable sysIO™ buffer supports wide range of interfaces: 

– LVCMOS 3.3/2.5/1.8/1.5/1.2

– LVTTL 

– PCI 

– LVDS, Bus-LVDS, MLVDS, RSDS, LVPECL 

– SSTL 25/18 

– HSTL 18 

– Schmitt trigger inputs, up to 0.5V hysteresis 

• I/Os support hot socketing 

• On-chip differential termination 

• Programmable pull-up or pull-down mode

 Flexible On-Chip Clocking 

• Eight primary clocks 

• Up to two edge clocks for high-speed I/O interfaces (top and bottom sides only) 

• Up to two analog PLLs per device with fractional-n frequency synthesis – Wide input frequency range (10 MHz to 400 MHz) 

 Non-volatile, Infinitely Reconfigurable 

• Instant-on – powers up in microseconds 

• Single-chip, secure solution 

• Programmable through JTAG, SPI or I2 C 

• Supports background programming of non-volatile memory 

• Optional dual boot with external SPI memory 

 TransFR™ Reconfiguration 

• In-field logic update while system operates 

 Enhanced System Level Support 

• On-chip hardened functions: SPI, I2 C, timer/ counter 

• On-chip oscillator with 5.5% accuracy 

• Unique TraceID for system tracking 

• One Time Programmable (OTP) mode 

• Single power supply with extended operating range 

• IEEE Standard 1149.1 boundary scan 

• IEEE 1532 compliant in-system programming 

 Broad Range of Package Options 

• TQFP, WLCSP, ucBGA, csBGA, caBGA, ftBGA, fpBGA, QFN package options 

• Small footprint package options – As small as 2.5x2.5mm 

• Density migration supported 

• Advanced halogen-free packaging


LCMXO2-2000ZE-3TG100I所属分类:现场可编程门阵列(FPGA),LCMXO2-2000ZE-3TG100I 由 莱迪思 (Lattice) 设计生产,可通过久芯网进行购买。LCMXO2-2000ZE-3TG100I价格参考¥120.594285,你可以下载 LCMXO2-2000ZE-3TG100I中文资料、PDF数据手册、Datasheet数据手册功能说明书,可查询LCMXO2-2000ZE-3TG100I规格参数、现货库存、封装信息等信息!

莱迪思 (Lattice)

莱迪思 (Lattice)

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