The Arria® II device family is designed specifically for ease-of-use. The cost-optimized, 40-nm device family architecture features a low-power, programmable logic engine and streamlined transceivers and I/Os. Common interfaces, such as the Physical Interface for PCI Express® (PCIe®), Ethernet, and DDR3 memory are easily implemented in your design with the Quartus® II software, the SOPC Builder design software, and a broad library of hard and soft intellectual property (IP) solutions from Altera. The Arria II device family makes designing for applications requiring transceivers operating at up to 6.375 Gbps fast and easy.
Feature
The Arria II device features consist of the following highlights:
■ 40-nm, low-power FPGA engine
■ Adaptive logic module (ALM) offers the highest logic efficiency in the industry
■ Eight-input fracturable look-up table (LUT)
■ Memory logic array blocks (MLABs) for efficient implementation of small FIFOs
■ High-performance digital signal processing (DSP) blocks up to 550 MHz
■ Configurable as 9 x 9-bit, 12 x 12-bit, 18 x 18-bit, and 36 x 36-bit full-precision multipliers as well as 18 x 36-bit high-precision multiplier
■ Hardcoded adders, subtractors, accumulators, and summation functions
■ Fully-integrated design flow with the MATLAB and DSP Builder software from Altera
