By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching 1 MIPS per MHz, balancing power consumption and processing speed.
Feature
- Advanced RISC architecture
- Power-on reset and programmable brown-out detection
- Internal calibrated RC oscillator
- External and internal interrupt sources
- Six sleep modes - idle, ADC noise reduction, power-save, power-down, standby and extended standby
- 131 Powerful instructions-most single clock cycle execution
- 32 x 8 General purpose working registers
- Fully static operation
- Up to 20MIPS throughput at 20MHz
- On-chip 2-cycle multiplier
- QTouch® library support
- JTAG (IEEE std. 1149.1 compliant) interface
- Programmable watchdog timer with separate on-chip oscillator
- On-chip analog comparator
- Interrupt and wake-up on pin change
