Cypress EZ-USB FX3 is the next generation USB3.0 peripheral controller providing highly integrated and flexible features that enable developers to add USB3.0 functionality to any system. EZ-USB FX3 has a fully configurable, parallel, General Programmable Interface called GPIF II, which can connect to any processor, ASIC, or FPGA.
The General Programmable Interface GPIF II is an enhanced version of the GPIF in FX2LP, Cypress’s flagship USB2.0 product. It provides easy and glueless connectivity to popular interfaces such as asynchronous SRAM, asynchronous and synchronous Address Data Multiplexed interface, parallel ATA, and so on. EZ-USB FX3 has integrated USB3.0 and USB2.0 physical layer (PHYs) along with a 32-bit ARM926EJ-S microprocessor for powerful data processing and for building custom applications. It implements an ingenious architecture which enables data transfers of 320 MBps[1] from GPIF II to USB interface. An integrated USB2.0 OTG controller enables applications that need dual role usage scenarios, for example EZ-USB FX3 may function as OTG Host to MSC and HID class devices.
Feature
Universal serial bus (USB) integration
USB 3.1, Gen 1 and USB 2.0 peripherals compliant with USB 3.1 Specification Revision 1.0 (TID # 340800007)
5-Gbps SuperSpeed PHY compliant with USB 3.1 Gen 1
High-speed On-The-Go (HS-OTG) host and peripheral compliant with OTG Supplement Version 2.0
Thirty-two physical endpoints
Support for battery charging Specification 1.1 and accessory charger adaptor (ACA) detection
General Programmable Interface (GPIF™ II)
Programmable 100-MHz GPIF II enables connectivity to a wide range of external devices
8-, 16-, 24-, and 32-bit data bus
Up to16 configurable control signals
Fully accessible 32-bit CPU
ARM926EJ core with 200-MHz operation
512-KB or 256-KB embedded SRAM
Additional connectivity to the following peripherals
SPI master at up to 33 MHz
UART support of up to 4 Mbps
I2C master controller at 1 MHz
I2S master (transmitter only) at sampling frequencies of 32 kHz, 44.1 kHz, and 48 kHz
Selectable clock input frequencies
19.2, 26, 38.4, and 52 MHz
19.2-MHz crystal input support
Ultra low-power in core power-down mode
Less than 60 µA with VBATT on and 20 µA with VBATT off
Independent power domains for core and I/O
Core operation at 1.2 V
I2S, UART, and SPI operation at 1.8 to 3.3 V
I2C operation at 1.2 V to 3.3 V
Package options
121-ball, 10- × 10-mm, 0.8-mm pitch Pb-free ball grid array (BGA)
131-ball, 4.7- × 5.1-mm, 0.4-mm pitch wafer-level chip scale package (WLCSP)
See Table 20 for details on the eight FX3 variants
EZ-USB® Software Development Kit (SDK) for code development of firmware and PC Applications
Includes RTOS Framework (using ThreadX Version 5)
Firmware examples covering all I/O modules
Visual Studio host examples using C++ and C#
SuperSpeed Explorer Board available for rapid prototyping
Several accessory boards also available:
Adapter boards for Xilinx/Altera FPGA development
Adapter board for Video development
CPLD board for concept testing and initial development
Applications
■ Digital video camcorders
■ Digital still cameras
■ Printers
■ Scanners
■ Video capture cards
■ Test and measurement equipment
■ Surveillance cameras
■ Personal navigation devices
■ Medical imaging devices
■ Video IP phones
■ Portable media players
■ Industrial cameras
■ Data loggers
■ Data acquisition
■ High-performance Human Interface Devices (gesture recognition)
