Feature
- Pipelined instruction architecture - Executes 70% of instruction set in 1 or 2 system clocks
- Up to 25MIPS throughput with 25MHz clock
- 2 Comparators
- Expanded interrupt handler
- On-chip debug circuitry facilitates full speed, non-intrusive in-system debug
- Provides breakpoints, single stepping, inspect/modify memory and registers
- Superior performance to emulation systems using ICE-chips, target pods and sockets
- Hardware enhanced UART, SMBus™ and SPI™ serial ports
- Four general purpose 16-bit counter/timers
- 16-bit Programmable counter array (PCA) with five capture/compare modules
- Real-time clock capability using PCA or timer and external clock source
- Internal oscillator - 24.5MHz with ±2% accuracy supports crystal-less UART operation
- External oscillator - Crystal, RC, C or clock (1 or 2 pin modes)
- Can switch between clock sources on-the-fly - useful in Power saving modes
