The ST26C32ABDR is a quad differential line receiver designed to meet the RS-422, RS-423 standards for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS.
The ST26C32ABDR has an input sensitivity of 200 mV over the common mode input voltage range of ± 7 V. The ST26C32ABDR features internal pull-up and pull-down resistors which prevent output oscillation on unused channels. The ST26C32ABDR provides an enable and disable function to all four receivers and features 3-state output with 6 mA source and sink capability.
Feature
- 3-state outputs for connection to system buses
- Meets the requirements of EIA standard RS-422, RS-423
- CMOS design for low power
- Typical propagation delay: 19ns
- ±0.2V sensitivity over input common mode voltage range
- Input will not load line when VCC = 0V
- Available in surface mount
- Typical input hysteresis: 60mV
