The PCA9646PW,118 is a monolithic CMOS integrated circuit for 2-wire bus buffering and switching in applications including I²C-bus, SMBus, PMBus, and other systems based on similar principles.
Each of the four outputs may be independently enabled in any combination as determined by the contents of the programmable control register. Each I/O is impedance isolated from all others, thus allowing a total of five branches of 2-wire bus with the maximum specified load (e.g., 5 × 400 pF for Fm+ I²C-bus at 1 MHz, or 5 × 4 nF at lower frequencies) (Ref. 1). More than one PCA9646PW,118 may be used in series, providing a substantial fan-out capability.
The PCA9646PW,118 includes a unidirectional buffer for the clock signal, and a bidirectional bufferfor the data signal. The direction of the clock signal may also be set by the contents of theprogrammable control register. Clock stretching and timing must always be under control of themaster device.
The PCA9646PW,118 has excellent application to 2-wire bus address expansion and increasing of maximum load capacitance. Very large LED displays are a perfect example.
Feature
- Drop-in pin compatible with PCA9546A, etc.
- Each I/O is impedance isolated from all others allowing maximum capacitance on all branches
- 30 mA static sink capability on all ports
- Works with I²C-bus (Standard-mode, Fast-mode, and Fast-mode Plus (Fm+)), SMBus (standard and high power mode), and PMBus
- Fast switching times allow operation in excess of 1 MHz
- Allows driving of large loads (e.g., 5 × 4 nF)
- Hysteresis on I/O increases noise immunity
- Operating voltages from 2.7 V to 5.5 V
- Uncomplicated characteristics suitable for quick implementation in most common 2-wire bus applications
- ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM perJESD22-C101
- Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
- Large arrays of I²C-bus components, e.g., LED displays
- Power management systems
- Game consoles, computers, RAID systems