M34E04-FMC9TG

The M34E04-FMC9TG is a 512-byte EEPROM device designed to operate the SMBus bus in the 1.7 V - 3.6 V voltage range, with a maximum of 1 MHz transfer rate in the 2.2 V - 3.6 V voltage range, over the JEDEC defined ambient temperature of 0°C / 95°C.

The M34E04-FMC9TG includes a 4-Kbit serial EEPROM organized as two pages of 256 bytes each, or 512 bytes of total memory. Each page is composed of two 128-byte blocks. The device is able to selectively lock the data in any or all of the four 128-byte blocks. Designed specifically for use in DRAM DIMMs (Dual Inline Memory Modules) with Serial Presence Detect, all the information concerning the DRAM module configuration (such as its access speed, its size, its organization) can be kept write-protected in one or more memory blocks. The M34E04-FMC9TG device is protocol-compatible with the previous generation of 2-Kbit devices, M34E02. The page selection method allows commands used with legacy devices such as M34E02 to be applied to the lower or upper pages of the EEPROM. Individually locking a 128-byte block may be accomplished using a software write protection mechanism in conjunction with a high input voltage VHV on input SA0. By sending the device a specific SMBus sequence, each block may be protected from writes until the write protection is electrically reversed using a separate SMBus sequence which also requires VHV on input SA0. The write protection for all four blocks is cleared simultaneously.

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