ATA664151-WNQW

The Microchip'sATA664151-WNQW is a system basis chip with an eight-channel high voltage switch interface, a LIN 2.1 and SAEJ2602-2-compliant LIN transceiver, low-drop voltage regulator, and an adjustable Window Watchdog. The Microchip ATA664151-WNQW provides 5V output voltage with up to 80mA current capability. This chip combination makes it possible to develop inexpensive, simple, yet powerful slave and master nodes for LIN bus systems. The Microchip ATA664151-WNQW is especially designed for LIN switch applications and includes almost the entire LIN node. They are designed to handle low data-rate communication in vehicles (such as in convenience electronics). Improved slope control at the LIN driver ensures secure data communication up to 20kBaud. Sleep Mode and Active Low-power Mode guarantee minimal current consumption even in the case of a floating bus line or a short circuit on the LIN bus to GND.

The Atmel� ATA664151-WNQW is a system basis chip with an eight-channel high voltage switch interface, a LIN 2.1 and SAEJ2602-2-compliant LIN transceiver, low-drop voltage regulator, and an adjustable Window Watchdog. The Atmel ATA664151-WNQW provides 5V output voltage with up to 80mA current capability. This chip combination makes it possible to develop inexpensive, simple, yet powerful slave and master nodes for LIN bus systems. The Atmel ATA664151-WNQW is especially designed for LIN switch applications and includes almost the entire LIN node. They are designed to handle low data-rate communication in vehicles (such as in convenience electronics). Improved slope control at the LIN driver ensures secure data communication up to 20kBaud. Sleep Mode and Active Low-power Mode guarantee minimal current consumption even in the case of a floating bus line or a short circuit on the LIN bus to GND. The ATA664151-WNQW is also available as SiP system in package solution (ATA664251) including the Atmel� Tiny 167 microcontroller together with the ATA664151-WNQW die in a 7*7mm� QFN package with 48 pins.

LIN System Basis Chip with LIN Transceiver, 5V Regulator, Watchdog, 8-channel High Voltage Switch Interface with High Voltage Current Sources, 16-bit SPI

8-channel HV switch interface with HV current sources Linear low-drop voltage regulator, to 80mA current capability, VCC 5.0V �2% Fulfills the OEM "Hardware Requirements for LIN in Automotive Applications Rev.1.3" LIN master and slave operation possible Supply voltage to 40V Operating voltage to 27V Internal voltage divider for VBattery sensing (�2%) 16-bit serial interface (daisy-chain-capable) for configuration and diagnosis Typically 8�A supply current during Sleep Mode Typically 35�A supply current in Active Low-power Mode VCC-undervoltage detection (4ms reset time) and watchdog reset logical combined at NRES open drain output LIN High-speed Mode to 200kBit/s Adjustable watchdog timer via external resistor Negative trigger input for watchdog LIN physical layer complies with LIN 2.1 specification and SAE J2602-2 Wake-up capability via LIN bus and CL15 Bus pin is overtemperature and short-circuit protected versus GND and Battery Advanced EMC and ESD performance Package: QFN32 5x5mm

The Atmel� is a system basis chip with an eight-channel high voltage switch interface, a LIN 2.1 and SAEJ2602-2compliant LIN transceiver, low-drop voltage regulator, and an adjustable Window Watchdog. The Atmel ATA664151-WNQW provides 5V output voltage with to 80mA current capability. This chip combination makes it possible to develop inexpensive, simple, yet powerful slave and master nodes for LIN bus systems. The Atmel ATA664151-WNQW is especially designed for LIN switch applications and includes almost the entire LIN node. They are designed to handle low data-rate communication in vehicles (such as in convenience electronics). Improved slope control at the LIN driver ensures secure data communication to 20kBaud. Sleep Mode and Active Low-power Mode guarantee minimal current consumption even in the case of a floating bus line or a short circuit on the LIN bus to GND. Figure 1-1. Block Diagram

Pinning Name TXD RXD NRES NIRQ MISO MOSI SCK NCS PWM2 PWM3 WDOSC VDIV IREF CS3 CL15 VBATT GND LIN Function LIN-bus logic data in from microcontroller LIN-bus logic data out to microcontroller Watchdog and VCC undervoltage Reset Output pin (active low, open drain) Interrupt request output to microcontroller (active low, open drain) SPI Master-In-Slave-Out output pin to microcontroller SPI Master-Out-Slave-In input pin from microcontroller SPI clock input from microcontroller SPI chip select logic input from microcontroller (active low) PWM control input port from microcontroller for first CS pin group PWM control input port from microcontroller for second CS pin group PWM control input port from microcontroller for third CS pin group Connection for external resistor to set watchdog frequency Voltage divider output / watchdog disable input pin Reference current adjustment pin High-voltage current sink/source and switch I/O pin no. 1 High-voltage current sink/source and switch I/O pin no. 2 High-voltage current sink/source and switch I/O pin no. 3 Wake-up on ignition high-voltage input pin Battery voltage input for voltage divider Ground connection LIN-bus connection

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