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SN74ACT7813-15DLR

  • 描述:电源电压: 4.5 V ~ 5.5 V 存储容量: 1.125K(64 x 18) 数据速度率: 67MHz 供应商设备包装: 56-SSOP 工作温度: 0摄氏度~70摄氏度 安装类别: 表面安装
  • 品牌: 德州仪器 (Texas)
  • 交期:5-7 工作日
渠道:
  • 自营
  • 得捷
  • 贸泽

起订量: 57

  • 库存: 8750
  • 单价: ¥38.24251
  • 数量:
    - +
  • 总计: ¥2,179.82
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规格参数

  • 制造厂商 德州仪器 (Texas)
  • 功能 同步的
  • 总线朝向 单向的
  • 支持可编程标志 Yes
  • 工作温度 0摄氏度~70摄氏度
  • 安装类别 表面安装
  • 电源电压 4.5 V ~ 5.5 V
  • FWFT的支持
  • 访达时期 12ns
  • 部件状态 过时的
  • 扩展类型 Width
  • 重传能力
  • 包装/外壳 56-BSSOP (0.295", 7.50毫米 Width)
  • 供应商设备包装 56-SSOP
  • 最大供电电流 400A.
  • 数据速度率 67MHz
  • 存储容量 1.125K(64 x 18)

SN74ACT7813-15DLR 产品详情

The SN74ACT7813-15DLR is a 64-word × 18-bit FIFO suited for buffering asynchronous datapaths up to 67-MHz clock rates and 12-ns access times. Two

devices can be configured for bidirectional data buffering without additional logic. Multiple distributed VCC and GND pins, along with Texas Instruments patented output edge control (OECTM) circuit, dampen simultaneous switching noise.

The write clock (WRTCLK) and read clock (RDCLK) are free running and can be asynchronous or coincident. Data is written to memory on the rising edge of WRTCLK when WRTEN1 is high, WRTEN2\ is low, and input ready (IR) is high. Data is read from memory on the rising edge of RDCLK when RDEN\, OE1\, and OE2\ are low and output ready (OR) is high. The first word written to memory is clocked through to the output buffer regardless of the RDEN\, OE1\, and OE2\ levels. The OR flag indicates that valid data is present on the output buffer.

The FIFO can be reset asynchronously to WRTCLK and RDCLK. RESET\ must be asserted while at least four WRTCLK and four RDCLK rising edges occur to clear the synchronizing registers. Resetting the FIFO initializes the IR, OR, and half-full (HF) flags low and the almost-full/almost-empty (AF/AE) flag high. The FIFO must be reset upon power up.

The SN74ACT7813-15DLR is characterized for operation from 0°C to 70°C.

Feature

  • Member of the Texas Instruments WidebusTM Family
  • Free-Running Read and Write Clocks Can Be Asynchronous or Coincident
  • Read and Write Operations Synchronized to Independent System Clocks
  • Input-Ready Flag Synchronized to Write Clock
  • Output-Ready Flag Synchronized to Read Clock
  • 64 Words by 18 Bits
  • Low-Power Advanced CMOS Technology
  • Half-Full Flag and Programmable Almost-Full/Almost-Empty Flag
  • Bidirectional Configuration and Width Expansion Without Additional Logic
  • Fast Access Times of 12 ns With a 50-pF Load and All Data Outputs Switching Simultaneously
  • Data Rates up to 67 MHz
  • Pin-to-Pin Compatible With SN74ACT7803 and SN74ACT7805
  • Packaged in Shrink Small-Outline 300-mil Package Using 25-mil Center-to-Center Spacing

SN74ACT7813-15DLR所属分类:先进先出(FIFO)存储芯片,SN74ACT7813-15DLR 由 德州仪器 (Texas) 设计生产,可通过久芯网进行购买。SN74ACT7813-15DLR价格参考¥38.242512,你可以下载 SN74ACT7813-15DLR中文资料、PDF数据手册、Datasheet数据手册功能说明书,可查询SN74ACT7813-15DLR规格参数、现货库存、封装信息等信息!

德州仪器 (Texas)

德州仪器 (Texas)

德州仪器公司(TI)是一家开发模拟IC和嵌入式处理器的全球半导体设计和制造公司。通过雇用世界上最聪明的人,TI创造了塑造技术未来的创新。如今,TI正在帮助超过10万名客户改变未来。

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