Feature
- Functionally compatible with the 72V255/65/75/85 SuperSync FIFOs
- Up to 166 MHz Operation of the Clocks
- User selectable Asynchronous read and/or write ports (BGA Only)
- User selectable input and output port bus sizing
- Pin to Pin compatible to the higher density 72V2x3/72V21x3 devices
- 5V tolerant inputs
- Auto power down minimizes standby power consumption
- Master Reset clears entire FIFO
- Partial Reset clears data, but retains programmable settings
- Easily expandable in depth and width
- JTAG port, provided for Boundary Scan function (BGA Only)
- Independent Read and Write Clocks
- Available in a 80-pin TQFP and 100-pin BGA packages
- Industrial temperature range (–40C to +85C) is available
