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CD74HC4017NSR

  • 描述:逻辑类型: 计数器,十年 电源电压: 2 V ~ 6 V 每个元件的位数: ten 计数速度率: 35兆赫 供应商设备包装: 16-SO 安装类别: 表面安装
  • 品牌: 德州仪器 (Texas)
  • 交期:2-3 工作日
渠道:
  • 自营
  • 得捷
  • 贸泽

起订量: 1

数量 单价 合计
1+ 4.24581 4.24581
200+ 1.64998 329.99660
500+ 1.58692 793.46350
1000+ 1.55539 1555.39800
  • 库存: 4789
  • 单价: ¥4.24582
  • 数量:
    - +
  • 总计: ¥4.25
在线询价

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规格参数

  • 部件状态 可供货
  • 定向 向上的
  • 元件数量 one
  • 定时 -
  • 逻辑类型 计数器,十年
  • 工作温度 -55摄氏度~125摄氏度
  • 重置 异步
  • 正反器类别 上升沿
  • 安装类别 表面安装
  • 包装/外壳 16-SOIC(0.209“,5.30毫米宽)
  • 制造厂商 德州仪器 (Texas)
  • 电源电压 2 V ~ 6 V
  • 每个元件的位数 ten
  • 供应商设备包装 16-SO
  • 计数速度率 35兆赫

CD74HC4017NSR 产品详情

The ’HC4017 is a high speed silicon gate CMOS 5-stage Johnson counter with 10 decoded outputs. Each of the decoded outputs is normally low and sequentially goes high on the low to high transition clock period of the 10 clock period cycle. The CARRY (TC) output transitions low to high after OUTPUT 10 goes low, and can be used in conjunction with the CLOCK ENABLE (CE\) to cascade several stages.The CLOCK ENABLE input disables counting when in the high state. A RESET (MR) input is also provided which when taken high sets all the decoded outputs, except "0", low.

The device can drive up to 10 low power Schottky equivalent loads.

Feature

  • Fully Static Operation
  • Buffered Inputs
  • Common Reset
  • Positive Edge Clocking
  • Typical fMAX = 50MHz at VCC =5V,CL = 15pF, TA =25°C
  • Fanout (Over Temperature Range)
    • Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . -55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
Description

The ’HC4017 is a high speed silicon gate CMOS 5-stage Johnson counter with 10 decoded outputs. Each of the decoded outputs is normally low and sequentially goes high on the low to high transition clock period of the 10 clock period cycle. The CARRY (TC) output transitions low to high after OUTPUT 10 goes low, and can be used in conjunction with the CLOCK ENABLE (CE\) to cascade several stages.The CLOCK ENABLE input disables counting when in the high state. A RESET (MR) input is also provided which when taken high sets all the decoded outputs, except "0", low.

The device can drive up to 10 low power Schottky equivalent loads.

CD74HC4017NSR所属分类:计数器/触发器芯片,CD74HC4017NSR 由 德州仪器 (Texas) 设计生产,可通过久芯网进行购买。CD74HC4017NSR价格参考¥4.245817,你可以下载 CD74HC4017NSR中文资料、PDF数据手册、Datasheet数据手册功能说明书,可查询CD74HC4017NSR规格参数、现货库存、封装信息等信息!

德州仪器 (Texas)

德州仪器 (Texas)

德州仪器公司(TI)是一家开发模拟IC和嵌入式处理器的全球半导体设计和制造公司。通过雇用世界上最聪明的人,TI创造了塑造技术未来的创新。如今,TI正在帮助超过10万名客户改变未来。

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