The CY7C441-30JI and CY7C443 are high-speed, low-power, first-in first-out (FIFO) memories with clocked read and write interfaces. Both FIFOs are 9 bits wide. The CY7C441-30JI has a 512 word by 9 bit memory array, while the CY7C443 has a 2048 word by 9 bit memory array. These devices provide solutions for a wide variety of data buffering needs, including high-speed data acquisition, multiprocessor interfaces, and communications buffering.
Feature
• High-speed, low-power, first-in first-out (FIFO) memories
• 512 x 9 (CY7C441)
• 2,048 x 9 (CY7C443)
• 0.65 micron CMOS for optimum speed/power
• High-speed 83-MHz operation (12 ns read/write cycle time)
• Low power — ICC=70 mA
• Fully asynchronous and simultaneous read and write operation
• Empty, Almost Empty, and Almost Full status flags
• TTL compatible
• Parity generation/checking
• Independent read and write enable pins
• Supports free-running 50% duty cycle clock inputs
• Center power and ground pins for reduced noise
• Width Expansion Capability
• Available in PLCC packages
