久芯网

IDT72T2098L10BB

  • 描述:电源电压: 2.375 V ~ 2.625 V 存储容量: 640K (32K x 20)(64K x 10) 数据速度率: 100MHz 供应商设备包装: 208-PBGA(17x17) 工作温度: 0摄氏度~70摄氏度 安装类别: 表面安装
  • 品牌: 瑞萨电子 (Renesas)
  • 交期:5-7 工作日
渠道:
  • 自营
  • 得捷
  • 贸泽

起订量: 1

  • 库存: 0
  • 单价: ¥512.06805
  • 数量:
    - +
  • 总计: ¥512.07
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规格参数

  • 功能 同步的
  • 访达时期 4.5纳秒
  • 总线朝向 单向的
  • 扩展类型 深度、宽度
  • 支持可编程标志 Yes
  • 重传能力 Yes
  • FWFT的支持 Yes
  • 工作温度 0摄氏度~70摄氏度
  • 安装类别 表面安装
  • 制造厂商 瑞萨电子 (Renesas)
  • 部件状态 过时的
  • 数据速度率 100MHz
  • 最大供电电流 60毫安
  • 电源电压 2.375 V ~ 2.625 V
  • 包装/外壳 208亿加仑
  • 供应商设备包装 208-PBGA(17x17)
  • 存储容量 640K (32K x 20)(64K x 10)

IDT72T2098L10BB 产品详情

:
The IDT72T2098/72T20108/72T20118/72T20128 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO) memories with the ability to read and write data on both rising and falling edges of clock. The device has a flexible x20/x10 Bus-Matching mode and the option to select Single or Double Data clock rates for input and output ports.

Feature

:
• Choose among the following memory organizations:
IDT72T2098 - 32,768 x 20/65,536 x 10
IDT72T20108 - 65,536 x 20/131,072 x 10
IDT72T20118 - 131,072 x 20/262,144 x 10
IDT72T20128 - 262,144 x 20/524,288 x 10
• Up to 250MHz Operation of Clocks
- 4ns read/write cycle time, 3.2ns access time
• Users selectable input port to output port data rates, 500Mb/s Data Rate
-DDR to DDR
-DDR to SDR
-SDR to DDR
-SDR to SDR
• User selectable HSTL or LVTTL I/Os
• Read Enable & Read Clock Echo outputs aid high speed operation
• 2.5V LVTTL or 1.8V, 1.5V HSTL Port Selectable Input/Ouput voltage
• 3.3V Input tolerant
• Mark & Retransmit, resets read pointer to user marked position
• Write Chip Select (WCS) input enables/disables Write Operations
• Read Chip Select (RCS) synchronous to RCLK
• Programmable Almost-Empty and Almost-Full flags, each flag can default to one of four preselected offsets
• Dedicated serial clock input for serial programming of flag offsets
• User selectable input and output port bus sizing
-x20 in to x20 out
-x20 in to x10 out
-x10 in to x20 out
-x10 in to x10 out
• Auto power down minimizes standby power consumption
• Master Reset clears entire FIFO
• Partial Reset clears data, but retains programmable settings
• Empty and Full flags signal FIFO status
• Select IDT Standard timing (using EF and FF flags) or First Word Fall Through timing (using OR and IR flags)
• Output enable puts data outputs into High-Impedance state
• JTAG port, provided for Boundary Scan function
• 208 Ball Grid array (PBGA), 17mm x 17mm, 1mm pitch
• Easily expandable in depth and width
• Independent Read and Write Clocks (permit reading and writing simultaneously)
• High-performance submicron CMOS technology
• Industrial temperature range (-40°C to +85°C) is available

IDT72T2098L10BB所属分类:先进先出(FIFO)存储芯片,IDT72T2098L10BB 由 瑞萨电子 (Renesas) 设计生产,可通过久芯网进行购买。IDT72T2098L10BB价格参考¥512.068047,你可以下载 IDT72T2098L10BB中文资料、PDF数据手册、Datasheet数据手册功能说明书,可查询IDT72T2098L10BB规格参数、现货库存、封装信息等信息!

瑞萨电子 (Renesas)

瑞萨电子 (Renesas)

Renesas Electronics Corporation通过完整的半导体解决方案提供值得信赖的嵌入式设计创新,使数十亿连接的智能设备能够改善人们的工作和生活方式—安全可靠。作为微控制器...

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