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74ALVCH16244DGGRE4

  • 描述:逻辑类型: 缓冲区,非反相 电源电压: 1.65伏~3.6伏 每个元件的位数: four 供应商设备包装: 48-TSSOP 工作温度: -40摄氏度~85摄氏度(TA) 安装类别: 表面安装
  • 品牌: 德州仪器 (Texas)
  • 交期:5-7 工作日
渠道:
  • 自营
  • 得捷
  • 贸泽

起订量: 2000

数量 单价 合计
2000+ 7.93459 15869.19400
  • 库存: 0
  • 单价: ¥7.93460
  • 数量:
    - +
  • 总计: ¥15,869.19
在线询价

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规格参数

  • 部件状态 可供货
  • 逻辑类型 缓冲区,非反相
  • 制造厂商 德州仪器 (Texas)
  • 输出类别 三态
  • 输入类别 -
  • 输出高电流, 输出低电流 24毫安, 24毫安
  • 工作温度 -40摄氏度~85摄氏度(TA)
  • 安装类别 表面安装
  • 每个元件的位数 four
  • 元件数量 four
  • 电源电压 1.65伏~3.6伏
  • 包装/外壳 48-TFSOP(0.240“,6.10毫米宽)
  • 供应商设备包装 48-TSSOP

74ALVCH16244DGGRE4 产品详情

Widebus is a trademark of Texas Instruments.

Description

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation.

The 74ALVCH16244DGGRE4 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

Feature

  • Member of the Texas Instruments Widebus? Family
  • Operates From 1.65 V to 3.6 V
  • Max tpd of 3 ns at 3.3 V
  • ±24-mA Output Drive at 3.3 V
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.

Description

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH16244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

74ALVCH16244DGGRE4所属分类:逻辑接收/发送/驱动/缓冲器,74ALVCH16244DGGRE4 由 德州仪器 (Texas) 设计生产,可通过久芯网进行购买。74ALVCH16244DGGRE4价格参考¥7.934597,你可以下载 74ALVCH16244DGGRE4中文资料、PDF数据手册、Datasheet数据手册功能说明书,可查询74ALVCH16244DGGRE4规格参数、现货库存、封装信息等信息!

德州仪器 (Texas)

德州仪器 (Texas)

德州仪器公司(TI)是一家开发模拟IC和嵌入式处理器的全球半导体设计和制造公司。通过雇用世界上最聪明的人,TI创造了塑造技术未来的创新。如今,TI正在帮助超过10万名客户改变未来。

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