The 74FCT3245PGG octal high-speed, low-power transceiver is ideal for asynchronous communication between two buses. The direction control pin (DIR) controls the direction of data flow. The output enable pin (OE) overrides the direction control and disables both ports. The 74FCT3245PGG has series current limiting resistors that offer low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The 74FCT3245PGG operates at -40C to +85C
Feature
- Stnd and A speeds
- ESD > 2000V per MIL-STD-883, Method 3015
- > 200V using machine model (C = 200pF, R = 0)
- VCC = 3.3V ±0.3V, Normal Range
- VCC = 2.7V to 3.6V, Extended Range
- CMOS power levels (0.4 uW typ. static)
- Rail-to-Rail output swing for increased noise margin
- Available in 20 pin QSOP and TSSOP packages