Advanced High-Speed CMOS, TTL logic
Operating voltage: 4.5 to 5.5
Compatibility: Input TTL, Output TTL
ESD protection exceeds JESD 22
Latch-up performance exceeds 250 mA per JESD 17
Feature
- Inputs are TTL-Voltage Compatible
- Contain Eight Flip-Flops With Single-Rail Outputs
- Direct Clear Input
- Individual Data Input to Each Flip-Flop
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
These devices are positive-edge-triggered D-type flip-flops with a direct clear (CLR) input.
