The SN74F377ADW is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The SN74F377ADW features a latched clock enable () input.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse ifis low. Clock triggering occurs at a particular voltage level and is not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at theinput.
The SN74F377ADW is characterized for operation from 0°C to 70°C.
Feature
- Contains Eight D-Type Flip-Flops With Single-Rail Outputs
- Clock Enable Latched to Avoid False Clocking
- Applications Include:
- Buffer/Storage Registers
- Shift Registers
- Pattern Generators
- Buffered Common Enable Input
- Package Options Include Plastic Small-Outline Packages andStandard Plastic 300-mil DIPs
