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UC2825AQDWREP

  • 描述:输出类别: 晶体管驱动器 拓扑结构: Boost、Flyback、Forward Converter、Full Bridge、Half Bridge、Push Pull 输出配置: 阳性的 开关频率: 400千赫兹 ~ 1MHz 供应商设备包装: 16-SOIC
  • 品牌: 德州仪器 (Texas)
  • 交期:5-7 工作日
渠道:
  • 自营
  • 得捷
  • 贸泽

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起订量: 1

数量 单价 合计
1+ 64.31695 64.31695
10+ 58.10254 581.02544
25+ 55.39949 1384.98735
100+ 48.10372 4810.37200
250+ 45.94200 11485.50100
500+ 44.61626 22308.13200
2000+ 44.61626 89232.52800
  • 库存: 756
  • 单价: ¥64.31695
  • 数量:
    - +
  • 总计: ¥64.32
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规格参数

  • 部件状态 可供货
  • 输出类别 晶体管驱动器
  • 输出配置 阳性的
  • 输出阶段 one
  • 功能 上一步,上一步/下一步
  • 串口 -
  • 安装类别 表面安装
  • 同步整流装置
  • 时钟同步
  • 供应商设备包装 16-SOIC
  • 制造厂商 德州仪器 (Texas)
  • 输出数量 two
  • 工作温度 -40摄氏度~125摄氏度(TJ)
  • 拓扑结构 Boost、Flyback、Forward Converter、Full Bridge、Half Bridge、Push Pull
  • 最大占空比 85%
  • 开关频率 400千赫兹 ~ 1MHz
  • 包装/外壳 16-SOIC(0.295“,7.50毫米宽)
  • 控制功能特性 电流限制、频率控制、斜坡、软启动
  • 电源电压 (Vcc/Vdd) 8.4V ~ 22V

UC2825AQDWREP 产品详情

(1) Additional temperature ranges are available - contact factory

Description

The UC2825A-EP pulse width modulation (PWM) controller is an improved version of the standard UC2825. Performance enhancements have been made to several of the circuit blocks. Error amplifier gain bandwidth product is 12 MHz, while input offset voltage is 2 mV. Current-limit threshold is specified to a tolerance of 5%. Oscillator discharge current is specified at 10 mA for accurate dead-time control. Frequency accuracy is improved to 6%. Startup supply current, typically 100 μA, is ideal for off-line applications. The output drivers are redesigned to actively sink current during undervoltage lockout (UVLO) at no expense to the startup current specification. In addition, each output is capable of 2-A peak currents during transitions.

Functional improvements also have been implemented in this family. The UC2825A-EP shutdown comparator is now a high-speed overcurrent comparator with a threshold of 1.2 V. The overcurrent comparator sets a latch that ensures full discharge of the soft-start capacitor before allowing a restart. While the fault latch is set, the outputs are in the low state. In the event of continuous faults, the soft-start capacitor is fully charged before discharge to ensure that the fault frequency does not exceed the designed soft-start period. The UC2825 CLOCK pin is CLK/LEB in the UC2825A-EP. This pin combines the functions of clock output and leading-edge blanking adjustment and has been buffered for easier interfacing.

The UC2825A-EP has dual alternating outputs and the same pin configuration as UC2825. UVLO thresholds are identical to the original UC2825.

Consult the application report, The UC3823A,B and UC2825A,B Enhanced Generation of PWM Controllers, literature number SLUA125, for detailed technical and applications information.

Feature

  • Improved Version of the UC2825 PWM
  • Compatible With Voltage-Mode or Current-Mode Control Methods
  • Practical Operation at Switching Frequencies to 1 MHz
  • 50-ns Propagation Delay to Output
  • High-Current Dual Totem-Pole Outputs (2-A Peak)
  • Trimmed Oscillator Discharge Current
  • Low 100-μA Startup Current
  • Pulse-by-Pulse Current-Limiting Comparator
  • Latched Overcurrent Comparator With Full Cycle Restart
  • APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C) Temperature Range(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

(1) Additional temperature ranges are available - contact factory

Description

The UC2825A-EP pulse width modulation (PWM) controller is an improved version of the standard UC2825. Performance enhancements have been made to several of the circuit blocks. Error amplifier gain bandwidth product is 12 MHz, while input offset voltage is 2 mV. Current-limit threshold is specified to a tolerance of 5%. Oscillator discharge current is specified at 10 mA for accurate dead-time control. Frequency accuracy is improved to 6%. Startup supply current, typically 100 μA, is ideal for off-line applications. The output drivers are redesigned to actively sink current during undervoltage lockout (UVLO) at no expense to the startup current specification. In addition, each output is capable of 2-A peak currents during transitions.

Functional improvements also have been implemented in this family. The UC2825A-EP shutdown comparator is now a high-speed overcurrent comparator with a threshold of 1.2 V. The overcurrent comparator sets a latch that ensures full discharge of the soft-start capacitor before allowing a restart. While the fault latch is set, the outputs are in the low state. In the event of continuous faults, the soft-start capacitor is fully charged before discharge to ensure that the fault frequency does not exceed the designed soft-start period. The UC2825 CLOCK pin is CLK/LEB in the UC2825A-EP. This pin combines the functions of clock output and leading-edge blanking adjustment and has been buffered for easier interfacing.

The UC2825A-EP has dual alternating outputs and the same pin configuration as UC2825. UVLO thresholds are identical to the original UC2825.

Consult the application report, The UC3823A,B and UC2825A,B Enhanced Generation of PWM Controllers, literature number SLUA125, for detailed technical and applications information.


UC2825AQDWREP所属分类:DC - DC开关控制器,UC2825AQDWREP 由 德州仪器 (Texas) 设计生产,可通过久芯网进行购买。UC2825AQDWREP价格参考¥64.316952,你可以下载 UC2825AQDWREP中文资料、PDF数据手册、Datasheet数据手册功能说明书,可查询UC2825AQDWREP规格参数、现货库存、封装信息等信息!

德州仪器 (Texas)

德州仪器 (Texas)

德州仪器公司(TI)是一家开发模拟IC和嵌入式处理器的全球半导体设计和制造公司。通过雇用世界上最聪明的人,TI创造了塑造技术未来的创新。如今,TI正在帮助超过10万名客户改变未来。

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