The 72V201L20J8 is a 256 x 9 First-In, First-Out memory with clocked read and write controls. It is a 3.3V version of the 72201 device. and is applicable for a wide variety of data buffering needs such as graphics, local area networks and interprocessor communication. It has 9-bit input and output ports. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dualclock operation.
Feature
- 10 ns read/write cycle time
- 5V input tolerant
- Read and Write clocks can be independent
- Dual-Ported zero fall-through time architecture
- Empty and Full Flags signal FIFO status
- Programmable Almost-Empty and Almost-Full flags can be set to any depth
- Programmable Almost-Empty and Almost-Full flags default to Empty+7, and Full-7, respectively
- Output Enable puts output data bus in high-impedance state
- Available in 32-pin PLCC and TQFP packages
- Industrial temperature range (–40C to +85C) is available
