The SY55852UKI is a flip-flop used to synchronize data to a clock. Its differential output will reproduce and remember the value on its input at the rising edge of the clock. In addition, an asynchronous, level sensitive reset is provided. For a synchonous reset, the SY55851U AnyGate® can be used.SY55852UKI inputs can be terminated with a single resistor between the true and complement pins of a given input.The SY55852UKI is a member of Micrel's SuperLite™ family of high-speed CML logic. This family features very small packaging and 2.3V to 5.7V operation.
Feature
- 2.5GHz min. fMAX
- 2.3V to 5.7V power supply
- Single bit register memory
- Synchronizes 1 bit of data to a clock
- Optimized to work with SuperLite™ family
- Fully differential
- Accepts CML, PECL, LVPECL input logic levels
- Source terminated CML outputs for fast edge rates
- Available in a tiny 10-pin MSOP
