MC14049UBDG

The MC14049UBDG hex inverter buffer is constructed with MOS P channel and N channel enhancement mode devices in a single monolithic structure.This complementary MOS device finds primaryuse where low power dissipation and or high noise immunity is desired. This device provides logic level conversion using only one supply voltage VDD. The input signal high level VIH can exceed the VDD supply voltage for logic level conversions.Two TTL DTL Loads can be driven when the device is used as CMOS to TTL DTL converters VDD = 5.0 V, VOL0.4 V IOL 3.2 mA. Note that pins 13 and 16 are not connected internally on this deviceconsequently connections to these terminals will not affect circuit operation.

Feature

(Picture: Pinout)