The 74LVC1G04GW,125 is a Single Inverter. The 74LVC1G04 provides one inverting buffer. Input can be driven from either 3.3 or 5V devices. This feature allows the use of these devices in a mixed 3.3 and 5V environment. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
Feature
- 5V Tolerant input for interfacing with 5V logic
- High noise immunity
- ±24mA Output drive (VCC=3.0V)
- CMOS Low power consumption
- Latch-up performance exceeds 250mA
- Direct interface with TTL levels
- Inputs accept voltages up to 5V
- Complies with JEDEC standard