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CD74HC573M

  • 描述:逻辑类型: D型透明闩锁 集成电路: 8:8 电源电压: 2V~6V 输出类别: 三态 供应商设备包装: 20-SOIC 安装类别: 表面安装
  • 品牌:
  • 交期:5-7 工作日
渠道:
  • 自营
  • 得捷
  • 贸泽

起订量: 699

数量 单价 合计
699+ 3.11444 2176.99845
  • 库存: 66220
  • 单价: ¥3.11445
  • 数量:
    - +
  • 总计: ¥2,177.00
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规格参数

  • 逻辑类型 D型透明闩锁
  • 集成电路 8:8
  • 输出类别 三态
  • 电源电压 2V~6V
  • 独立电路板 one
  • 输出高电流, 输出低电流 7.8毫安, 7.8毫安
  • 安装类别 表面安装
  • 部件状态 过时的
  • 制造厂商
  • 工作温度 -55摄氏度~125摄氏度
  • 延迟时间传播状态 30纳秒
  • 包装/外壳 20-SOIC(0.295“,7.50毫米宽)
  • 供应商设备包装 20-SOIC

CD74HC573M 产品详情

The 'HC573 devices are octal transparent D-type latches designed for 2-V to 6-V VCC operation.

When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs.

A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE\ does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Feature

  • 2-V to 6-V VCC Operation
  • Wide Operating Temperature Range of –55°C to 125°C
  • 3-State Outputs Directly Drive Bus Lines
  • Balanced Propagation Delays and Transition Times
  • Bus Driver Outputs Drive Up To 15 LS-TTL Loads
  • Significant Power Reduction Compared to LS-TTL Logic ICs
Description

The 'HC573 devices are octal transparent D-type latches designed for 2-V to 6-V VCC operation.

When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs.

A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE\ does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

CD74HC573M所属分类:锁存器,CD74HC573M 由 设计生产,可通过久芯网进行购买。CD74HC573M价格参考¥3.114447,你可以下载 CD74HC573M中文资料、PDF数据手册、Datasheet数据手册功能说明书,可查询CD74HC573M规格参数、现货库存、封装信息等信息!
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