■LOW POWER DISSIPATION: lcc=1uA(MAX.) at TA=25℃
■HIGH NOISE IMMUNITY: VNlH=VNIL=28% Vcc(MlN.)
■POWER DOWN PROTECTION ON INPUTS
■SYMMETRICAL OUTPUT IMPEDANCE: lloHl=loL=8mA(MIN) at Vcc=4.5V. BALANCED PROPAGATION DELAYS: tPLH=tPHL
. OPERATING VOLTAGE RANGE: VCc(OPR)=2V to 5.5V
. IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V1G00 is an advanced high-speed CMOS SINGLE 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C-MOS technology.
The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.
Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage.This device can be used to interface 5V to 3V.
(Picture:Pinout / Diagram)
