The M74HC280B1R is a high-speed CMOS 9-bit parity generator fabricated with silicon gate C2MOS technology.
It is composed of nine data inputs (A to I) and odd/even parity outputs (ΣODD and ΣEVEN). The nine data inputs control the output conditions. When the number of high-level inputs is odd, ΣODD outputs are kept high and ΣEVEN outputs are kept low. Conversely, when the number of high-level outputs is even, ΣEVEN outputs are kept high and ΣODD outputs are kept low. The IC generates either odd or even parity making the application flexible. The word-length capability is easily expanded by cascading.
All inputs are equipped with protection circuits against static discharge and transient excess voltage.
Feature
- HBM: 2 kV
- MM: 200 V
- CDM: 1 kV
