Each of these data selectors/multiplexers contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output-control inputs are provided for each of the two 4-line sections.
The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (in the high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level. Each output has its own output-enable (OE)\ input. The outputs are disabled when their respective OE\ is high.
Feature
- 3-State Version of ’HC153
- Wide Operating Voltage Range of 2 V to 6 V
- High-Current Inverting Outputs Drive Up To 15 LSTTL Loads
- Low Power Consumption, 80-μA Max ICC
- Typical tpd = 9 ns
- ±6-mA Output Drive at 5 V
- Low Input Current of 1 μA Max
- Permit Multiplexing From n Lines to One Line
- Perform Parallel-to-Serial Conversion
