The SN74CBTLV3861DWR provides ten bits of high-speed bus switching. The low on-state resistance of the switch allowsconnections to be made with minimal propagation delay.
The device is organized as one 10-bit bus switch. When output enable (OE\) is low, the 10-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Feature
- 5- Switch Connection Between Two Ports
- Rail-to-Rail Switching on Data I/O Ports
- Ioff Supports Partial-Power-Down Mode Operation
- Flow-Through Architecture Optimizes PCB Layout
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
The SN74CBTLV3861 provides ten bits of high-speed bus switching. The low on-state resistance of the switch allowsconnections to be made with minimal propagation delay.
The device is organized as one 10-bit bus switch. When output enable (OE\) is low, the 10-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
