Data sheet acquired from Harris Semiconductor
DescriptionCD4030BNSR types consist of four independent Exclusive-OR gates. THe CD4030BNSR provides the system designer with a means for direct implementation of the Exclusive-OR function.
The CD4030BNSR types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-lineplastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrinksmall-outline packages (PW and PWR suffixes).
Feature
- Medium-speed operation—tPHL, tPLH = 65 ns (typ.) at VDD = 10 V, CL = 50 pF
- 100% tested for quiescent current at 20 V
- Standardized, symmetrical output characteristics
- 5-V, 10-V, and 15-V parametric ratings
- Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (over full package-temperature range) = 1 V at VDD = 5 V 2 V at VDD = 10 V2.5 V at VDD = 15 V
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
- Applications:
- Even and odd-parity generators and checkers
- Logical comparators
- Adders/subtractors
- General logic functions
Data sheet acquired from Harris Semiconductor
DescriptionCD4030B types consist of four independent Exclusive-OR gates. THe CD4030B provides the system designer with a means for direct implementation of the Exclusive-OR function.
The CD4030B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-lineplastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrinksmall-outline packages (PW and PWR suffixes).
