High-Speed CMOS Logic
Operating Voltage 4.5 to 5.5 V
Compatibility: Input TTL, Output CMOS
Feature
- Chip Complexity: 122 FETs or 30.5 Equivalent Gates
- Output Drive Capability: 10 LSTTL Loads
- TTL/NMOS Compatible Input Levels
- Operating Voltage Range: 4.5 to 5.5 V
- Low Input Current: 1.0 µA
- Outputs Directly Interface to CMOS, NMOS, and TTL
- In Compliance with the Requirements Defined by JEDEC Standard No. 7A
- Pb-Free Packages are Available*
(Picture: Pinout)