74HCT595D/AUJ

The 74HCT595D is a 8-bit serial-in, serial or parallel-out Shift Register with output latches and 3-state output. The registers have separate clocks. The 74HCT595 is high-speed Si-gate CMOS devices and are pin compatible with low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard number 7A. Data is shifted on the positive-going transitions of the shift register clock input (SHCP). The data in each register is transferred to the storage register on a positive-going transition of the storage register clock input (STCP). If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.

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