These devices each contain an 8-bit D-type sorage register. The storage register has buffered ('LS594) or open-collector ('LS599) outputs. Separate clocks and direct-overriding clears are provided on both the shift and storage registers. A shift output (QH') is provided for cascading purposes.
Both the shift register and the storage register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the shift register will always be one clock pulse ahead of the storage register.
Feature
- 8-Bit Serial-In, Parallel-Out Shift Registers with Storage
- Choice of Output Configurations:
'LS594 . . . Buffered
'LS599 . . . Open-Collector - Guaranteed Shift Frequeny:
DC to 20 MHz - Independent Direct-Overriding Clears on Shift and Storage Registers
