Feature
- Fully programmable dataplane allows introduction of new features via in-field upgrade
- Support for new overlays and tunneling such as GENEVE, NSH, VXLAN, GPE, MPLS, MPLS over GRE/UDP,GUE, ILA and PPPoE
- Up to 128x 25G integrated SerDes with CL 74, CL 91and CL 108 FEC
- New instrumentation features such as timestamping, trace captures and Inband Telemetry
- 32MB of on-chip fully shared packet buffer
- Dynamic Load Balancing enhances ECMP
- Large, programmable on-chip forwarding databases for L2 switching, L3 routing, label switching, and overlay forwarding
- 3X increased ACL scale to support evolving policy/security requirements
- PCIe Gen3 x4 host CPU interface with on-chip accelerators improves control-plane update and boot performance by up to 5X
- Programmable support for enhanced network telemetry, including per-packet timestamping, Flow Tracker, microburst detection, latency/drop monitor, Active-probe-based in-band network telemetry, and in-band OAM processing; integrated with open-source BroadView v2 telemetry agent and analytics software
- Adaptive Routing for dynamic traffic engineering in non-Clostopologies
- Full feature compatibility with previous generation Trident 2 and Trident 2+ devices
Applications
- Single-chip solution for data center Top-of-Rack, Aggregation and Spine Switches
- Data center Fixed and Chassis/Modular switches
- Enterprise aggregation and converged core
- Data Center Interconnect (DCI)
- Software-Defined Networking Solutions