CD45148 Output "High"on Select
CD4515B Output"Low"on Select
■CD4514BE and-CD45158 consist of a 4-bit strobed latch and a 4-to 16-1ine decoder. The latches hold the last input data presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0(CD4514B) or 1(CD4515B) regardless of the state of the data or strobe inputs.
The decode truth table indicates all combi-nations of data inputs and appropriate se-lected outputs.
These devices are similar to industry types MC14514 and MC14515. The CD4514BE and CD4515B types are supplied in 16-lead hermetic dual-in -dine ceramic packages (F3A suffix),16-lead dual-in-line plastic packages (E suffix), and 16-lead small-outline packages(M and M96 suffixes).
Featiures:
■Strobed input latch
■Inhibit control
■100% tested for quiescent current at 20V
■Maximum input current of 1 uA at 18V over full package-temperature range;100 nA at 18 V and 25℃
Noite margin (over full package temper-ature range):
1Vat VDD*5V
2Vat VDD=10V
2.5Vat Vop=15V
■5-V,10-V, and 15-V parametric ratings
■Standardized, symmetrical output characteristics.
■Meets all requirements of JEDEC Tentative
Standard No.13B;"Standard Specifications for Description of 'B' Series CMOS Devices"
Applications:
■Digital multiplexing
■Address decoding
■Hexadecimal/BCD decoding· Program-counter decoding
■Control decoder
Feature
- Strobed input latch
- Inhibit control
- 100% Tested for quiescent current at 20V
- Standardized, symmetrical output characteristics
- Meets all requirements of JEDEC tentative standard #13B
(Picture: Pinout)
