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You should also know the parameters:what type of electronic parts,Output Current,Input Voltage,Operating temperature range,Package type,Operating Frequency etc.
View the FDMS86101 datasheet to confirm the model.
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Feature
- Each Channel Has Independent Direction Control
- Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
- Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2 V to 3.6 V Power-Supply Range
- I/Os Are 4.6 V Tolerant
- Ioff Supports Partial-Power-Down Mode Operation
- VCC Isolation Feature - If Either VCC Input is at GND, Both Ports are in High-Impedance State
- Typical Data Rates
- 500 Mbps (1.8 V to 3.3 V Level-Shifting)
- 320 Mbps (<1.8 V to 3.3 V Level-Shifting)
- 320 Mbps (Translate to 2.5 V or 1.8 V)
- 280 Mbps (Translate to 1.5 V)
- 240 Mbps (Translate to 1.2 V)
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 5000 V Human-Body Model (A114-A)
- 200 V Machine Model (A115-A)
- 1500 V Charged-Device Model (C101)
This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.
The SN74AVC2T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE must be connected to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
