Widebus is a trademark of Texas Instruments.
DescriptionThe SN74ABTE16246DLG4 is an 11-bit noninverting transceiver designed for asynchronous two-way communication between buses. This device has open-collector and 3-state outputs. The device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so that the buses are effectively isolated. When OE\ is low, the device is active.
The B port has an equivalent 25- series output resistor to reduce ringing. Active bus-hold inputs on the B port hold unused or floating inputs at a valid logic level.
The A port provides for the precharging of the outputs via VCCBIAS, which establishes a voltage between 1.3 V and 1.7 V when VCC is not connected.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
Feature
- Member of the Texas Instruments Widebus? Family
- Supports the VME64 ETL Specification
- Reduced TTL-Compatible Input Threshold Range
- High-Drive Outputs (IOH = –60 mA, IOL = 90 mA) Support Equivalent 25- Incident-Wave Switching
- VCC BIAS Pin Minimizes Signal Distortion During Live Insertion
- Internal Pullup Resistor on OE\ Keeps Outputs in High-Impedance State During Power Up or Power Down
- Distributed VCC and GND Pins Minimize High-Speed Switching Noise
- Equivalent 25- Series Damping Resistor on B Port
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Widebus is a trademark of Texas Instruments.
DescriptionThe SN74ABTE16246 is an 11-bit noninverting transceiver designed for asynchronous two-way communication between buses. This device has open-collector and 3-state outputs. The device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so that the buses are effectively isolated. When OE\ is low, the device is active.
The B port has an equivalent 25- series output resistor to reduce ringing. Active bus-hold inputs on the B port hold unused or floating inputs at a valid logic level.
The A port provides for the precharging of the outputs via VCCBIAS, which establishes a voltage between 1.3 V and 1.7 V when VCC is not connected.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
