Description
NB4N855S is a clock or data Receiver/Driver/Buffer/Translator capable of translating AnyLevel input signal (LVPECL, CML, HSTL, LVDS, or LVTTL/LVCMOS) to LVDS. Depending on the distance, noise immunity of the system design, and transmission line media, this device will receive, drive or translate data or clock signals up to 1.5 Gb/s or 1.0 GHz, respectively. This device is pin−for−pin plug in compatible to the SY55855V in a 3.3 V applications. The NB4N855S has a wide input common mode range of GND + 50 mV to VCC − 50 mV. This feature is ideal for translating differential or single−ended data or clock signals to 350 mV typical LVDS output levels. The device is offered in a small 10 lead MSOP package. NB4N855S is targeted for data, wireless and telecom applications as well as high speed logic interface where jitter and package size are main requirements. Application notes, models, and support documentation are available at www.onsemi.com.
Features
• Guaranteed Input Clock Frequency up to 1.0 GHz
• Guaranteed Input Data Rate up to 1.5 Gb/s
• 490 ps Maximum Propagation Delay
• 1.0 ps Maximum RMS Jitter
• 180 ps Maximum Rise/Fall Times
• Single Power Supply; VCC = 3.3 V ±10%
• Temperature Compensated TIA/EIA−644 Compliant LVDS Outputs
• GND + 50 mV to VCC − 50 mV VCMR Range
• Pb−Free Package is Available
(Picture: Pinout)
