The CDC328ANSR contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew for clock distribution. Through the use of the polarity-control inputs (T\/C), various combinations of true and complementary outputs can be obtained.
The CDC328ANSR is characterized for operation from -40°C to 85°C.
Feature
- Low Output Skew for Clock-Distribution and Clock-GenerationApplications
- TTL-Compatible Inputs and Outputs
- Distributes One Clock Input to Six Clock Outputs
- Polarity Control Selects True or Complementary Outputs
- Distributed VCC and GND Pins Reduce Switching Noise
- High-Drive Outputs (-48-mA IOH, 48-mAIOL)
- State-of-the-Art EPIC-IIB TM BiCMOS DesignSignificantly Reduces Power Dissipation
- Package Options Include Plastic Small-Outline (D) and ShrinkSmall-Outline (DB) Packages