The SY100ELT23LZG TR are dual differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the ELT23 makes it ideal for applications which require the tranlation of a clock and a data signal.The ELT23 is compatible with positive ECL 100K logic levels.
Feature
- 3.0 ns typical propagation delay
- <500ps output-to-output skew
- Differential PECL inputs
- 24mA TTL outputs
- Flow-through pinouts
- Internal 50kOhm pulldown resistors
- Available in 8-pin SOIC package
