All trademarks are the property of their respective owners.
DescriptionThis dual-bit noninverting bus transceiver uses two separate configurable power-supplyrails. The A port is designed to track VCCA. VCCAaccepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to trackVCCB. VCCB accepts any supply voltage from 1.65 V to5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V,2.5-V, 3.3-V, and 5-V voltage nodes.
The SN74LVC2T45DCURG4 is designed for asynchronous communication between two data buses. Thelogic levels of the direction-control (DIR) input activate either the B-port outputs or the A-portoutputs. The device transmits data from the A bus to the B bus when the B-port outputs areactivated, and from the B bus to the A bus when the A-port outputs are activated. The inputcircuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied toprevent excess ICC and ICCZ.
The SN74LVC2T45DCURG4 is designed so that the DIR input circuit is supplied byVCCA. This device is fully specified for partial-power-down applicationsusing Ioff. The Ioff circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if eitherVCC input is at GND, both ports are in the high-impedance state. NanoFree?package technology is a major breakthrough in IC packaging concepts, using the die as thepackage.
Feature
- Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full1.65-V to 5.5-V Power-Supply Range
- VCC Isolation Feature – If Either VCCInput Is at GND, Both Ports Are in the High-Impedance State
- DIR Input Circuit Referenced to VCCA
- Low Power Consumption, 4-μA Max ICC
- Available in the Texas Instruments NanoFree? Package
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Partial-Power-Down Mode Operation
- Max Data Rates
- 420 Mbps (3.3-V to 5-V Translation)
- 210 Mbps (Translate to 3.3 V)
- 140 Mbps (Translate to 2.5 V)
- 75 Mbps (Translate to 1.8 V)
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 4000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
All trademarks are the property of their respective owners.
DescriptionThis dual-bit noninverting bus transceiver uses two separate configurable power-supplyrails. The A port is designed to track VCCA. VCCAaccepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to trackVCCB. VCCB accepts any supply voltage from 1.65 V to5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V,2.5-V, 3.3-V, and 5-V voltage nodes.
The SN74LVC2T45 is designed for asynchronous communication between two data buses. Thelogic levels of the direction-control (DIR) input activate either the B-port outputs or the A-portoutputs. The device transmits data from the A bus to the B bus when the B-port outputs areactivated, and from the B bus to the A bus when the A-port outputs are activated. The inputcircuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied toprevent excess ICC and ICCZ.
The SN74LVC2T45 is designed so that the DIR input circuit is supplied byVCCA. This device is fully specified for partial-power-down applicationsusing Ioff. The Ioff circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if eitherVCC input is at GND, both ports are in the high-impedance state. NanoFree?package technology is a major breakthrough in IC packaging concepts, using the die as thepackage.
