The 4DB0226KB0AVG8 is a DDR4 Data Buffer with a dual 4-bit bidirectional data register with differential strobes is designed for 1.2 VDD operation.
Feature
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Pinout optimized DDR4 LRDIMM PCB layout
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DDR4-1600/1866/2133/2400/2667
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Supports CKE Power Down operation mode
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Provides access to internal control words for configuring the device features and adapting in different LRDIMM and system applications
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Available in 53-ball fine-pitch BGA (FPGA) with 0.50mm ball pitch, 14 x 5 Grid with 17 balls depopulated, 7.5mm x 3.0mm package as defined in MO-276 (Issue F, Variation DA)
