The 7164S70DB 5V CMOS SRAM is organized as 8K x 8. The 7164S70DB offers a reduced power standby mode. The low-power (L) version also offers a battery backup data retention capability at power supply levels as low as 2V. All inputs and outputs of the IDT7164S70DB are TTL-compatible and operation is from a single 5V supply, simplifying system designs. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. Military grade product is available.
Feature
- High-speed address/chip select access time – Military: 20/25/35/45/55/70/85/100ns (max.) – Industrial: 20/25ns (max.) – Commercial: 20/25ns (max.)
- Low power consumption
- Battery backup operation – 2V data retention voltage (L Version only)
- Produced with advanced CMOS high-performance technology
- Inputs and outputs directly TTL-compatible
- Three-state outputs
- Available in 28-pin DIP, CERDIP and SOJ packages
- Military product compliant to MIL-STD-883, Class B