Feature
- True Dual-Ported memory cells which allow simultaneous access of the same memory location
- Versatile control for write: separate write control for lower
- and upper byte of each port
- easily expands data bus width to 32 bits or more using SLAVE
- On-chip port arbitration logic
- BUSY input
- Fully asynchronous operation from either port
- Battery backup operation–2V data retention
- TTL-compatible
- single 5V (±10%) power supply
- Available in 68-pin ceramic PGA, Flatpack, PLCC and 100-pin TQFP packages
- Industrial temperature range (–40C to +85C) is available
