The ADP5041ACPZ-1-R7 combines one high performance buck regulator and two low dropout (LDO) regulators in a small 20-lead LFCSP to meet demanding performance and board space requirements.
The high switching frequency of the buck regulator enables use of tiny multilayer external components and minimizes board space.
When the MODE pin is set to logic high, the buck regulator operates in forced PWM mode. When the MODE pin is set to logic low, the buck regulator operates in PWM mode when the load is around the nominal value. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM), improving the light load efficiency. The low quiescent current, low dropout voltage, and wide input voltage range of the ADP5041ACPZ-1-R7 LDOs extend the battery life of portable devices. The ADP5041ACPZ-1-R7 LDOs maintain a power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.
Each regulator in the ADP5041ACPZ-1-R7 is activated by a high level on the respective enable pin. The output voltages of the regulators and the reset threshold are programmed through external resistor dividers to address a variety of applications. The ADP5041ACPZ-1-R7 contains supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. They also provide power-on reset signals. An on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period.
Feature
- Input voltage range: 2.3 V to 5.5 V
- One 1.2 A buck regulator
- Two 300 mA LDOs
- 20-lead, 4 mm × 4 mm LFCSP package
- Overcurrent and thermal protection
- Soft start
- Undervoltage lockout
- Open-drain processor reset with externally adjustable threshold monitoring
- Guaranteed reset output valid to VAVIN = 1 V
- Manual reset input
- Watchdog refresh input
- Buck key specifications
- Output voltage range: 0.8 V to 3.8 V
- Current mode topology for excellent transient response
- 3 MHz operating frequency
- Peak efficiency up to 96%
- Uses tiny multilayer inductors and capacitors
- Mode pin selects forced PWM or auto PWM/PSM mode
- 100% duty cycle low dropout mode
- LDOs key specifications
- Output voltage range: 0.8 V to 5.2 V
- Low input supply voltage from 1.7 V to 5.5 V
- Stable with 2.2 μF ceramic output capacitors
- High PSRR
- Low output noise
- Low dropout voltage
- −40°C to +125°C junction temperature range
(Picture: Pinout)
