ISL6539IA

The ISL6539IA dual PWM controller delivers high efficiency and tight regulation from two voltage regulating synchronous buck DC/DC converters. It was designed especially for DDR DRAM, SDRAM, graphic chipset applications, and system regulators in high performance applications. Voltage-feed-forward ramp modulation, current mode control, and internal feedback compensation provide fast response to input voltage and output load transients. Input current ripple is minimized by channel-to-channel PWM phase shift of 0°, 90° or 180° (determined by input voltage and status of the DDR pin). The ISL6539IA can control two independent output voltages adjustable from 0.9V to 5.5V or, by activating the DDR pin, transform into a complete DDR memory power supply solution. In DDR mode, CH2 output voltage VTT tracks CH1 output voltage VDDQ. CH2 output can both source and sink current, an essential power supply feature for DDR memory. The reference voltage VREF required by DDR memory is generated as well. In dual power supply applications the ISL6539IA monitors the output voltage of both CH1 and CH2. An independent PGOOD (power good) signal is asserted for each channel after thesoft-start sequence has completed, and the output voltage is within PGOOD window. In DDR mode CH1 generates the only PGOOD signal. Built-in overvoltage protection prevents the output from going above 115% of the set point by holding the lower MOSFET on and the upper MOSFET off. When the output voltage decays below the overvoltage threshold, normal operation automatically resumes. Once the soft-start sequence has completed, undervoltage protection latches the offending channel off if the output drops below 75% of its set point value for the dual switcher. Adjustable overcurrent protection (OCP) monitors the voltage drop across the rDS(ON) of the lower MOSFET. If more precise current-sensing is required, an external current sense resistor may be used.

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