The NXP® MC33780EGR2 is a master device for two differential DBUS buses. It contains the logic to interface the buses to a standard serial peripheral interface (SPI) port and the analog circuitry to drive data and power over the bus as well as receive data from the remote slave devices.
- The differential mode of the MC33780EGR2 generates lower electromagnetic interference (EMI) in situations where data rates and wiring make this a problem
- Frequency spreading further reduces interference by spreading the energy across many channels, reducing the energy in any single channel
Feature
- Two Independent DBUS I/Os
- Common SPI Interface for All Operations
- Open-Drain Interrupt Output with Pull-up
- Maskable Interrupts for Send and Receive Data Status
- Automatic Message Cyclical Redundancy Checking (CRC)
- Generation and Checking
- Four-Stage Transmit and Receive Buffers
- 8- to 16-Bit Messages with 0- to 8-Bit CRC
- Independent Frequency Spreading for Each Channel
