CF1140A

Xilinx® space-grade FPGAs offer a compelling alternative to ASIC and other one-time programmable logic technologies. The Virtex®-4QV family provides three domainspecific, radiation-tolerant sub-families, with different mixes of capabilities:

• LX: High-performance logic

• SX: Ultra-high performance signal processing

• FX: Embedded processing

Large-Capacity System Integration and High-Performance in Space 

Building on the Xilinx legacy of space-grade reconfigurable FPGAs established with the Virtex and Virtex-II families, the Virtex-4QV family delivers exceptional levels of integration and performance. These devices meet the requirements of demanding applications including video, communications, radar, packet processing, and encryption. Xilinx Virtex-4QV devices offer up to 200,000* logic cells, 10Mbit of RAM/FIFO, two built-in PowerPC® 405 processor blocks with an APU controller, 512 DSP™ slices, and four built-in Ethernet blocks. Virtex-4QV FPGAs deliver outstanding performance with 400Mhz clocking, DSP slices delivering 204 GMACs at 400MHz, and 350MHz PowerPC processors, all in a single device. Flexible 800 Mbps differential I/O and 500 Mbps singleended I/O support industry-standard and custom protocols. The APU controller in the PowerPC processor block makes it easy to integrate custom offload hardware to boost processing performance. Special processing combined with SEE mitigation techniques and tools make it possible for aerospace designers to take advantage of all the benefits of high-performance, highdensity FPGA technology. In-system reconfiguration enables engineers to make hardware design changes to enhance system functionality at any time, even after launch.

Guaranteed Radiation Tolerance 

Virtex-4QV FPGAs are guaranteed for total ionizing dose and single-event latch-up immunity. Xilinx pioneered the application of SRAM-based FPGAs in high-radiation environments and together with JPL founded the Xilinx Radiation Test Consortium to conduct single-event upset (SEU) characterization and report the results.

Widest Selection of IP and Tools 

To help accelerate every phase of system design, Xilinx offers a complete development ecosystem that includes: ISE™ Design Suite, the award-winning FPGA design software that helps you achieve maximum performance and rapid timing closure; the EDK embedded development kit; the XtremeDSP tools package including System Generator for DSP and AccelDSP™ synthesis tool; ChipScope™ analyzer; a library of more than 600 proven IP cores; application notes; and Xilinx training and support services.

• Total Ionizing Dose – Xilinx tests each wafer lot per Method 1019 to ensure that device performance meets or exceeds the guaranteed DC electrical specification requirements, as well as AC and timing parameters at 300 krad (Si). 

• Single-Event Latchup – The radiation-tolerant Virtex-4QV technology incorporates a thin epitaxial layer in the wafer manufacturing process for latchup immunity. For each Virtex-4QV device type, the SEE consortium verifies latchup immunity at maximum Vcc and operating temperature, subjected to a heavy ion fluence exceeding 1x107 particles/cm2, with linear energy transfer (LET) exceeding 125 MeVxcm2/mg. 

• Single-Event Upset — Xilinx conducts additional experiments in heavy ion, proton, and neutron environments in order to measure and document the susceptibility and consequence of SEU(s). The SEE Consortium oversees and validates the test methods, empirical data collected, and resulting analysis. In conjunction with the SEE Consortium, Xilinx develops beamtested, upset mitigation solutions. For mitigation, Xilinx provides triple modular redundant reference designs, configuration memory scrubbing application notes, and the TMRTool™ for automating error-free triplication of designs destined for space.

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