The inherant linearity of the ADC is excellent, and endpoint accuracy is ensured by self-calibration of zero and full scale which may be initiated at any time.The self-calibration scheme can also be extended to null system offset and gain errors in the input channel.
The output data is accessed through a flexible serial port, which has an asynchronous mode compatible with UARTs and two synchronous modes suitable for interfacing to shift registers or the serial ports of industry-standard microcontrollers.
CMOS construction insures low power dissipation, and a power down mode reduces the idle power consumption to only 10 µW.
Feature
- 0 V to +2.5 V or ±2.5 V Analog Input Range
- 4 kSPS Output Data Rate
- Flexible Serial Interface
- Ultralow Power
- 0 V to +2.5 V or ±2.5 V Analog Input Range
- 4 kSPS Output Data Rate
- Flexible Serial Interface
- Ultralow Power
